Mac Mania 2/MacMania 2.toast/Demo's/Tools&Utilities/PowerPC/The PowerPC Revolution!

Text File | 1994-06-16 | 24.3 KB | 371 lines | [TEXT/ttxt]

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<The following excerpt was reprinted with permission from the upcoming MaxFacts(tm) Special
Report entitled "The PowerPC Revolution!" This illustrated report, written by well known
author Jim Hoskins, reviews the history leading to the landmark Apple/IBM/Motorola alliance,
provides a close look at the four PowerPC microprocessors, and examines the individual and
often surprising strategies of Apple, IBM, and Motorola. 50pp; Available July 1994; $26.95;
Maximum Press, voice 800-989-6733 (source code 351), fax [phone]; copyright Maximum
Press 1994; all product names are trademarks of their respective companies>
------------------------------------------------------------------------------------------------------------------


1.0 Introducing the PowerPC

The advent and introduction of the new PowerPC family of microprocessors by the Apple, IBM, and
Motorola alliance is one of the most important and far-reaching events in recent computer history.
With the PowerPC, these three companies have locked arms and stepped boldly into the raging river
of Intel-based personal computer hardware and software in an attempt to make a major change in the
flow of that river.

Although there are many electronic circuits in computer systems, the element that contributes the
most to the system's capabilities and performance is its microprocessor(s). A microprocessor is a
single chip containing millions of microscopic circuits that work together to do the data manipulation
or  thinking  necessary to perform tasks for the computer's user. It executes the instructions that
make up a computer program, acts as the control center for information flow inside the computer,
and performs calculations on the data. The main processor resides on a large circuit board (called the
system board or motherboard) housed inside the computer's mechanical frame.

Today, the Intel family of microprocessors is firmly entrenched as the standard of the personal
computer world. The PowerPC initiative represents the first real threat to Intel's dominance since the
introduction of the first Intel-based personal computer the IBM PC announced in 1981. In order
to fully understand the significance of the Apple, IBM, and Motorola alliance and the PowerPC, it
is necessary to first reflect on a bit of history.


1.1 A Glance Backwards

In 1975, IBM began work on a project known only as the  801 project.  Named after the building
in which it resided, the 801 project was an experiment to develop a minicomputer that bucked the
existing trend toward complex computer programming instructions. Under the leadership of IBM
scientist John Cocke, the 801 approach was to simplify the range of instructions used to perform
tasks and optimize the computer to execute this limited range of instructions with extreme efficiency.
Born of this approach was the name reduced instruction set computing or RISC. Although RISC
technology was used in some IBM products over the ensuing years, including the System/370 and
9370 mainframe computer families, RISC was not to enter the personal computer realm for 11 more
years!

IBM entered the personal computer business on August 12, 1981, when an informal leg of IBM in
Boca Raton, Florida, announced the IBM Personal Computer (IBM PC). The IBM PC was an
experiment conducted by 12 developers under the leadership of IBM's Philip (Don) Estridge. The
small computer system was designed in 12 months from off-the-shelf components including Intel's
8088 microprocessor. Not even the 12 developers imagined that the seed they planted with the IBM
PC would grow to become a multi-billion dollar businesses.

Over the next decade, Intel developed more powerful microprocessors including the 80286, 80386,
80486, and finally the Pentium   currently Intel's most powerful microprocessor. Every time Intel
developed a new microprocessor, IBM and many other companies making IBM-compatible
computers (called clones) introduced more powerful computer systems that employed the new Intel
microprocessor.

In each case, Intel made sure the programs written to run on earlier Intel microprocessors would be
run on the new microprocessor. This is a critical point because the market acceptance and therefore
commercial success of each microprocessor (and the computer systems that employed it) was largely
determined by the number and popularity of programs available to run on it. Maintaining software
compatibility with earlier microprocessors meant that all of the programs written over the years for
ealier microprocessors were immediately available to run on the new microprocessor. This business
model proved to be extremely successful for Intel, IBM, clone manufactures, and software
developers. Over the  years, a large base of software for Intel-based, IBM-compatible computers
developed, including many classic success stories such as Microsoft (makers of the best-selling
Windows product), Lotus (makers of the 1-2-3 Spreadsheet program), and WordPerfect (makers of
a popular word processing program of the same name) to name just a few.

Meanwhile, Steve Jobs at Apple Computer had chosen Motorola's 68000 microprocessor family for
Apple's family of computers. First came the Lisa in 1983, which met with minimal success. Then, on
January 24, 1984, Apple introduced the Macintosh, which offered unprecedented ease of use and
turned out to be an enormous success. As with IBM's personal computer family, the Apple Macintosh
family grew in power and diversity, with larger desktop systems and portable PowerBook models.
Each time Motorola produced a more powerful microprocessor, Apple used it in their Macintosh line.
Though there are many more IBM-compatible computers in use today than there are Apple
Macintosh systems, the Macintosh holds a strong second place.

In January 1986, IBM announced the first personal computer class product to utilize the RISC
approach they had worked with 11 years earlier: the IBM Personal Computer RT (for RISC
Technology). The Personal Computer RT ran IBM's variation of the UNIX operating system, called
AIX, rather than the DOS operating system that was the standard at the time. Due primarily to a lack
of application programs for the Personal Computer RT and IBM's niche market positioning of the
product, the Personal Computer RT met with limited success.

Also in 1986, in Austin, Texas, the same team of IBM hardware and software engineers took on the
task of designing a new product family. It would represent IBM's second-generation RISC
technology, combining the RISC philosophy and more traditional concepts with a goal of achieving
superior performance. The result is the RISC System/6000 family of products and AIX version
3 both introduced on February 15, 1990. Since its introduction, the RISC System/6000 family of
hardware and the AIX operating system have been widely accepted in the technical workstation and
UNIX multiuser commercial environments. This acceptance is largely due to their price/performance
parameters, larger set of application programs, and more effective marketing.

Here was the situation in 1991. IBM and other computer manufacturers had delivered millions of
Intel-based personal computers, and the software companies had developed thousands of popular
application programs for these computers. Microsoft had dominated the software industry with its
Windows extension to the DOS operating system, which added many of the ease-of-use features
previously available only on the Apple Macintosh. Although the microprocessor chips of both Intel
and Motorola were growing in performance at a strong pace, so were the power requirements for
those chips just when power-miser notebook computers were growing in popularity Furthermore,
the performance advantage of RISC architectures was becoming more widely known by the industry
as the RS/6000 and other RISC-based systems grew in popularity. Apple, IBM, and Motorola sensed
that the time was ripe for a fundamental change.


1.2 The Apple/IBM/Motorola Alliance

At the first meeting of Apple and IBM neither group knew exactly what to expect. For example, out
of respect for the more casual style at Apple, the IBMers dressed in casual clothes. Out of respect
for the more formal IBM culture, the Apple employees dressed in suits. After a good laugh, the
meeting proceeded. This initial spirit of mutual respect and cooperation resulted in the formation of
an historic and sweeping alliance between Apple, IBM, and Motorola announced by the companies
on October 2, 1991. At the same time, the alliance announced five separate initiatives including:

 PowerPC/Somerset Design Center: Apple, IBM, and Motorola were to team up and develop a new
family of RISC-based microprocessors, which would start to become available in two to three years.
To this end, the 37,000-square-foot Somerset Design Center located in Austin, Texas, was put into
operation by IBM and Motorola with Apple's engineering participation in May 1992. Named after
the King Arthur's legendary kingdom of Somerset, the facility represents a combined investment by
the three companies of over $1 billion. The companies would leverage existing technologies, share
costs, and seek high-volume applications in order to reduce the cost of these new RISC chips to
below that of traditional RISC microprocessors. Somerset was staffed primarily by IBM and
Motorola with approximately 300 engineers.

Taligent: Apple and IBM formed Taligent to develop a wholly new operating system based on the
emerging object-oriented software technology which promises to streamline software development.
Although elements of the technology being developed by Taligent will appear in other operating
systems including Apple's System 7 and IBM's WorkPlace OS. The complete Taligent operating
system is not expected until the middle of this decade.

Kaleida: Apple and IBM formed Kaleida to develop multimedia standards and technology, including
a multimedia programming language called ScriptX. Multimedia is a term used to describe the
interactive presentation of sound, video, images, computer graphics, and text all coordinated by a
computer system.

PowerOpen: Apple, IBM, and Motorola were founding members of the PowerOpen Association,
an independent corporation formed in Mary of 1993. The intent of the PowerOpen Environment is
to create a software specification based on the PowerPC architecture, IBM's AIX (IBM's version of
a UNIX operating system), and the Macintosh's popular user interface. PowerOpen-compliant
operating systems will allow UNIX-based computers to run Apple and AIX application programs on
PowerPC-based systems.

Macintosh and IBM Systems Networking: This was an initiative to make Apple's popular
Macintosh computers better able to participate in IBM computer networks.


1.3 PowerPC Overview

PowerPC is the name given to a new family of microprocessors that conform to the PowerPC
architecture. The fact that both the family of microprocessor chips and the architecture they
implement are named PowerPC can be confusing. However, it is important to understand the
distinction. The PowerPC architecture is a set of rules documented by Apple/IBM/Motorola in the
PowerPC Architecture Manual that describe the behavioral characteristics which all compliant
microprocessors must posses. Each member of the PowerPC microprocessor family is but one of
many possible implementations of the PowerPC architecture.

The Apple/IBM/Motorola alliance has announced four individual microprocessor implementations
of the PowerPC architecture:

   PowerPC 601: The bridge microprocessor from POWER to PowerPC for early adopters of
    PowerPC

   PowerPC 603: PowerPC microprocessor for cost-sensitive portables/low-power, low-cost
    systems

   PowerPC 604: Mainstream, high-performance microprocessor for uniprocessor or
    multiprocessor desktop PCs, workstations and low-end servers

    PowerPC 620: 64-bit, high-performance microprocessor for high-end workstations, servers,
    and multiprocessor systems.

Figure 2 shows the PowerPC microprocessor family at a glance and indicates the range of computer
types spanned by each member. Due to the parallel development efforts on these chips at Somerset,
Apple/IBM/Motorola intend to deliver a wide range of performance and function over a four-year
period from 1993 through 1996. By comparison, it took ten years to get from the 68000
microprocessr to the 68040 microprocessor. Now let's take a closer look at the PowerPC architecture
and microprocessors.


2.0 A Closer Look at the PowerPC

Figure 3 lists some basic characteristics of the PowerPC architecture and microprocessors determine
the their overall capabilities and performance. This section takes a closer look at the following aspects
of PowerPC:

    PowerPC Architecture
    PowerPC 601 Microprocessor
    PowerPC 603 Microprocessor
    PowerPC 604 Microprocessor
    PowerPC 620 Microprocessor
    PowerPC Memory Management
    PowerPC Performance Overview


2.1 Architecture

The PowerPC architecture is a reduced instruction set computing (RISC) architecture. The
concept of RISC (pronounced  risk ) was explored within IBM during the 1970s. As the name
 RISC  implies, the instruction set (i.e., the list of the various programming instructions that can be
executed within the computer) is simplified and reduced compared with more traditional computers
using complex instruction set computing (CISC) architectures. Today's most popular
microprocessors, including the Intel 80X86 family and the Motorola 680X0 family, are based on
CISC architectures.

Because the instructions in RISC architectures are very simple, programming instructions can more
efficiently flow through the microprocessor's circuitry often resulting in an average execution time
for each instruction roughly equivalent to the duration of one system clock pulse. The system clock
is the heartbeat of the computer system. It steps the PowerPC 601 microprocessor through each step
in the execution of a program. It is the time reference of the microprocessor and sets the pace for all
microprocessor activity. Also, because the RISC instructions are simple, the can be implemented
directly in circuitry on the microprocessor (which makes for more efficient execution) without taking
up too much chip space thus reducing chip costs and power consumption while making room on the
chip for other circuitry that can help improve performance (e.g. more registers).

Due to the complexity of CISC instructions, each instruction is typically performed by executing a
predefined sequence of {micro-instructions (also called microcode). This means that the average
execution time for each CISC instruction is typically much greater than the duration of one system
clock pulse (often equivalent to many system clock pulses). Further, the simple instruction set of a
RISC computer typically can be carefully employed (by sophisticated compilers) to perform even
complex functions in a more efficient manner than is yielded by the CISC approach. So, although a
typical CISC instruction performs more work than a typical RISC instruction, the combination of
RISC instructions needed to perform a specific task usually takes less time to execute than the
combination of CISC instructions needed to perform that task (see  RISC vs CISC Performance ).
As it turns out, the RISC architecture also helps improve performance in a way  originally
unanticipated. The RISC approach makes it more manageable to execute more than one instruction
at a time (i.e., during one system clock pulse). Designs with this ability to dispatch and execute
multiple instructions simultaneously are called superscalar designs. Because superscalar designs can
do two or more things at once, they can get work done more quickly than equivalent non-superscalar
designs. While today's CISC architectures also employ superscalar techniques, the simpler and more
consistent RISC instructions usually lend themselves to simpler (thus less expensive and lower power)
superscalar implementations. When used together, RISC and superscalar concepts make for
microprocessors that have an average execution rate higher than one instruction per system clock
pulse providing better overall microprocessor performance than CISC designs for many applications.
IBM's first RISC architecture was used in the earlier IBM RT system, which had limited market
acceptance. IBM's second-generation RISC architecture, called the Performance Optimized With
Enhanced RISC (POWER) architecture, was introduced in February of 1990 with IBM's now
popular RISC System/6000 family of UNIX-based workstations. The POWER architecture utilizes
a blend of the original RISC architecture and some traditional CISC concepts, with an emphasis on
doing multiple operations at the same time (superscalar).

In 1991, a team of computer architects from Apple, IBM, and Motorola worked to define a single
architecture that would pave the way for future computing in everything from small portable
computers to the most powerful supercomputers. The result of this work was the PowerPC
architecture introduced in October of 1991. IBM owns the rights to the PowerPC architecture and
licenses it to Apple, Motorola, and other companies. Some key goals for the new PowerPC
architecture included the following:

   Maintain compatibility with RISC System/6000 application programs (start with the
POWER architecture as a base design)

   Enable more powerful addressing/data handling/software (extend the POWER
architecture from 32 bits to 64 bits and add single-precision floating point instructions and bi-endian
support)

   Facilitate low-cost, smaller, faster, single-chip implementations (eliminate some of the
more complex instructions in the POWER architecture)

   Facilitate aggressive superscalar implementations (remove some features found in the
POWER architecture that complicated superscalar implementation)

   Facilitate multiprocessing (add features that allow a single computer system to employ
multiple microprocessors in parallel to perform work)

The most significant enhancement over the POWER architecture introduced in the PowerPC
architecture was the extension to 64 bits. The smallest piece of information stored within a computer
is called a bit. These bits are grouped into bytes (8 bits), half-words (16 bits), words (32 bits), and
double words (64 bits) to form the computer's representation of numbers, letters of the alphabet,
memory addresses, instructions in a program, and so on. The extension to 64 bits means that the
all-important general registers (used to hold information being acted upon by the microprocessor)
within a compliant microprocessor must be capable of holding 64-bits. While some registers in
POWER (i.e. those that hold floating point data) were already 64-bits wide, other very important
registers (i.e. those holding integer data) were expanded from 32-bits to 64-bits in the PowerPC
architecture. Since programming instructions act (i.e. move, add, etc.) on the contents of  registers
- bigger registers means that more information can be processed by each instruction. Also, address
registers used to access information stored in main memory (the circuits within a computer system
designed to hold information) are elongated to 64 bits, which enables computer systems to manage
more main memory (an ever-increasing need). Instructions that handle single-precision (32-bit)
floating point operands were added to the PowerPC architecture for those applications that need
speed more than accuracy.

Because extending the architecture to 64 bits causes incompatibilities with programs written for the
32-bit POWER architecture, special provisions were made in the PowerPC architecture to recover
this compatibility. That is, 64-bit implementations of the PowerPC architecture will support a function
that allows software to switch the computer's mode of operation back and forth between 32-bit
compatibility mode and 64-bit native mode. This switch is implemented in a way that has very little
effect on the operation/performance of the microprocessor. It should be noted that only one of the
four microprocessors announced so far (the PowerPC 620) implements the 64-bit architecture. The
others implement the 32-bit option defined in the PowerPC architecture.

As mentioned earlier, some of the instructions provided in the POWER architecture were not
included in the PowerPC architecture in order to better accommodate superscalar and
multiprocessor implementations of the PowerPC architecture (see  The Multiprocessor
Advantage ). What does this mean for compatibility with RISC System/6000 programs? The
PowerPC architecture maintains complete compatibility (at the binary level) with application
programs (i.e., POWER's user-privilege instructions but not with earlier RISC System/6000
operating system versions. This is because some of the operating-system-only programming
instructions (i.e., POWER's OS-privilege instructions) offered on the original POWER architecture
are not supported in the PowerPC architecture. Even though three rarely used user-privilege
instructions from the POWER architecture are not supported in the PowerPC architecture, care was
taken to allow the operating system to intercept these instructions and translate them on the fly
(emulate them) to allow normal operation to continue.

Another important compatibility issue lies in the way a microprocessor organizes information in main
memory. As we saw earlier, information is stored as  words  each consisting of four bytes and stored
in sequential memory addresses. Some microprocessors (e.g. Motorola 680X0 and those used in
RS/6000 systems) store the highest-order (i.e. most significant) byte of the word in the first memory
address. This is called big-endian byte ordering because the  big-end  of the word comes first in
memory. Other microprocessors (e.g. Intel 80X86) store the lowest-order (i.e. least significant) byte
in the first memory address. This is called little-endian byte ordering because the  little-end  of the
word comes first in memory. In order to preserve compatibility with both of these environments and
the operating systems based on each, the PowerPC Architecture requires compliant microprocessors
to support both byte ordering schemes. The default byte ordering scheme is big-endian but it can be
set to little-endian under program control.

The bottom line is that PowerPC-compliant computer systems can run POWER (i.e., RISC
System/6000) application programs as well as other types of application programs, as we will see
later.

 With this understanding of the PowerPC architecture, let's now look more closely at each of the four
PowerPC microprocessor implementations: PowerPC 601, PowerPC 603, PowerPC 604, PowerPC
620.


Complete Table of Contents for "The PowerPC Revolution!"

Abstract
Executive Summary
1.0  Introducing the PowerPC
    1.1 A Glance Backwards
    1.2 The Apple/IBM/Motorola Alliance
    1.3 PowerPC Overview
2.0  A Closer Look at the PowerPC
    2.1 Architecture
    2.2 601 Microprocessor
    2.3 603 Microprocessor
    2.4 604 Microprocessor
    2.5 620 Microprocessor
    2.6 Memory Management
    2.7 Performance Overview
3.0  The PowerPC and Software
    3.1 Software Basics
    3.2 PowerPC Software Challenges
    3.3 The PowerOpen Environment
4.0  Apple's Vision for the PowerPC
    4.1 The First PowerPC Macs
    4.2 Apple's Software Strategy
    4.3 Upgrades for Existing Macs
    4.4 Macs of the Future
5.0  IBM's Vision for the PowerPC
    5.1 RS/6000 Systems
    5.2 Power Personal Systems
         5.2.1 The PowerPC Reference Platform
         5.2.2 Operating System Strategy
    5.3 AS/400 Systems
    5.4 Other IBM Product Lines
6.0  Motorola's Vision for the PowerPC
    6.1 Promoting a New Standard
    6.2 Other PowerPC-Related Projects

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<The preceeding excerpt was reprinted with permission from the upcoming MaxFacts(tm) Special
Report entitled "The PowerPC Revolution!" This illustrated report, written by well known author
Jim Hoskins, reviews the history leading to the landmark Apple/IBM/Motorola alliance, provides a
close look at the four PowerPC microprocessors, and examines the individual and often surprising
strategies of Apple, IBM, and Motorola. 50pp; Available July 1994; $26.95; Maximum Press, voice
800-989-6733 (source code 351), fax [phone]; copyright Maximum Press 1994; all product
names are trademarks of their respective companies>
------------------------------------------------------------------------------------------------------------------